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Card Edge Connector
Industrial, IT Datacom
The 36-pin PCIe edge-card slot shows up everywhere full x16 is overkill — industrial SBCs, FPGA carrier cards, AI accelerator daughter boards, and embedded vision modules. You need Gen 3 signal integrity in a tight footprint, a latch that survives shipping vibration, and a housing that won't warp during reflow. CONSHARE's BR0361 family answers that brief, and two stock options cover most builds: BR0361A35K1ER (STD PBT) and BR0361A41K1ER (GUIDE LCP+30% G/F). Both share the same contact geometry, latch footprint, and 1.00 mm pitch — the housing material is the only difference, and that single decision drives your reflow profile, dimensional stability, and unit cost. The image below shows the dimensional outline, mounting footprint, and solder pad layout for the BR0361 PCIe 36P vertical SMT connector (alt: PCIe 3.0 36-pin edge card connector with latch, no logo, black housing; title: BR0361 PCIe 36P SMT connector technical drawing).
Picking the wrong housing burns cash on over-spec or ships a board that drifts out of spec on the second reflow pass. Here's the practical split:
Housing Option | Part Number | Best Fit | Watch Out For |
|---|---|---|---|
STD PBT (Polybutylene Terephthalate) | BR0361A35K1ER | Single-pass reflow, commercial-grade builds, cost-sensitive volume runs | Higher CTE above 180°C; less stable on second-side reflow |
GUIDE LCP+30% G/F (Liquid Crystal Polymer, glass-filled) | BR0361A41K1ER | Lead-free reflow, double-sided assemblies, automotive or outdoor thermal profiles | ~20-30% higher unit cost; over-spec for low-temperature single-pass builds |
Reach for STD PBT when: your board sees one reflow pass, your operating envelope stays under 105°C, and you're optimizing BOM cost on commercial product runs. PBT has decades of field history in card-edge sockets.
Reach for GUIDE LCP when: you're running lead-free profiles above 250°C, your layout demands coplanarity across all 36 pads during a second-side reflow, or your end product faces wide thermal swings. The 30% glass-fiber reinforcement tightens the CTE and pushes HDT well past where PBT begins to drift.
The 36-pin count maps to a PCIe x4 lane configuration (the de facto standard for many FPGA and accelerator daughter cards), and the overall envelope stays compact enough for embedded SBCs and 2.5" carrier boards. The recommended PCB layout drawing for the BR0361 connector (alt: PCIe 36-pin SMT edge card PCB pad pattern; title: BR0361 PCIe connector recommended PCB layout) confirms direct compatibility with standard edge-card finger geometry.
Parameter | Value | What It Means For Your Layout |
|---|---|---|
Pin Count | 36 | x4 PCIe lane + sideband signal capacity |
Pitch | 1.00 mm | Standard PCIe edge-card spacing |
Overall Length | 25.0 ± 0.25 mm | Fits inside a 28 mm pad array |
Overall Width | 27.00 ± 0.35 mm | Includes side latch posts |
Housing Height (above board) | 7.65 mm | Clearance for inserted edge card |
Solder Tail Length | 2.40 mm | Sufficient for 1.6 mm standard PCB; verify on thicker backplanes |
Recommended Pad Width | 0.70 ± 0.05 mm | Matches standard PCIe finger pad pattern |
No custom finger routing is needed — drop it onto a standard PCIe edge-card footprint and the connector drops into alignment.
Controlled lab specs only matter if they survive your wave-solder line and vibration testing. Here's how each number translates into something your QA team can actually act on:
Performance Area | Specification | Production Implication |
|---|---|---|
Contact Resistance | 30 mΩ max | Holds signal loss under the Gen 3 budget; verify with 4-wire Kelvin test on incoming lots |
Insulation Resistance | 1000 MΩ min | Indicates clean dielectric molding; moisture-soak tests catch lot-level failures |
Dielectric Withstand | 500 V DC/min | Adequate margin for 12 V rail creepage on industrial PSUs |
Current Rating | 1.1 A per pin min | Supports aux power lanes without derating |
Insertion Force | 1.15 N per contact pair max | Total ≈ 41 N for 36 pins — confirm mating tooling delivers this consistently |
Extraction Force | 0.15 N per contact pair min | Retains the card under 5 G vibration, releases without tools |
Durability | 50 cycles | Covers typical maintenance/rework cycles, not high-cycle test fixtures |
Terminals use copper alloy with gold flash in the contact zone, 80 µ" min tin in the solder tail, and 50 µ" nickel underplate throughout. For higher mating cycles or harsher environments, CONSHARE supplies the same BR0361 family with 3 µ", 5 µ", 10 µ", 15 µ", or 30 µ" selective gold plating.
A connector is only as dependable as the supply chain behind it. CONSHARE runs terminal stamping, latch forming, LCP/PBT injection molding, and final assembly in one certified facility. That structure pays off in three ways your procurement team can measure:
Batch consistency. Every lot ships with a full dimensional report and a solderability sample. You're not gambling on an unknown reel from a trading company.
Lead time control. Stock BR0361A35K1ER and BR0361A41K1ER ship inside the standard lead window. Custom plating, latch length, or packaging modifications typically clear production within two to three weeks.
Engineering access. Layout needs a tweaked PCB keep-out or a non-standard latch height? You talk to the people who built the tooling, not a distributor reading a script.
RoHS compliance is standard (suffix "E"); halogen-free certification (suffix "H") is available across the family.
Scenario A — Consumer IoT gateway with single reflow pass BR0361A35K1ER (STD PBT). Save the budget for flash gold; your thermal envelope doesn't justify LCP.
Scenario B — Industrial vision system with double-sided reflow and outdoor enclosure BR0361A41K1ER (GUIDE LCP). The glass-filled housing holds flatness across the second reflow and won't creep at elevated ambient temperatures.
Scenario C — FPGA dev kit with high-mate-cycle test fixtures STD PBT base part, but ask CONSHARE about the 30 µ" gold plating variant — same BR0361 family, different plating code.
Scenario D — White-label OEM needing custom branding The no-logo housing accepts your silk-screen or laser-etched brand mark without tooling modification.
PBT handles peak temperatures around 250°C, but multiple thermal cycles push it past its comfort zone. If your board goes through a second-side reflow or selective solder rework, step up to the LCP variant.
The cap is an integrated dust/handling cover molded as part of the housing. The Mylar option is a thin insulation film added for pin protection during shipping and assembly. Both ship under the BR0361 family — confirm the suffix when ordering.
The copper-alloy latch retains the card under typical 5 G sinusoidal, 50–500 Hz sweep profiles. For higher shock loads (MIL-STD-810 or similar), talk to CONSHARE engineering about locking-tab modifications.
Tube, tray, and tape-and-reel (both with cap and without cap) ship as standard configurations.
White housing (suffix L) is available for designs where the connector remains visible in the final assembly — medical devices, white-box consumer electronics, lab instrumentation.
Part Number | Description | Housing Material | Plating |
|---|---|---|---|
BR0361A35K1ER | PCIe 3.0 36P Vertical SMT Connector with Latch | STD PBT | Flash Gold |
BR0361A41K1ER | PCIe 3.0 36P Vertical SMT Connector with Latch | GUIDE LCP+30% G/F | Flash Gold |
For tape-and-reel packaging, tray packaging, custom gold plating (3 µ" through 30 µ"), white housing, halogen-free certification, or modified latch geometry, contact CONSHARE with your project requirements. Engineering samples for prototype builds typically ship inside one week.